ROSE 2.15.0
Loading...
Searching...
No Matches
Dispatcher.h
1#ifndef ROSE_BinaryAnalysis_InstructionSemantics_BaseSemantics_Dispatcher_H
2#define ROSE_BinaryAnalysis_InstructionSemantics_BaseSemantics_Dispatcher_H
3#include <featureTests.h>
4#ifdef ROSE_ENABLE_BINARY_ANALYSIS
5
6#include <Rose/BinaryAnalysis/BasicTypes.h>
7#include <Rose/BinaryAnalysis/InstructionSemantics/BaseSemantics/RiscOperators.h>
8
9#include <boost/enable_shared_from_this.hpp>
10
11#ifdef ROSE_ENABLE_BOOST_SERIALIZATION
12#include <boost/serialization/access.hpp>
13#include <boost/serialization/export.hpp>
14#include <boost/serialization/nvp.hpp>
15#include <boost/serialization/shared_ptr.hpp>
16#endif
17
18namespace Rose {
19namespace BinaryAnalysis {
20namespace InstructionSemantics {
21namespace BaseSemantics {
22
24// Instruction Dispatcher
26
29public:
30 virtual ~InsnProcessor() {}
31 virtual void process(const DispatcherPtr &dispatcher, SgAsmInstruction *insn) = 0;
32};
33
47class Dispatcher: public boost::enable_shared_from_this<Dispatcher> {
48public:
51
52private:
53 Architecture::BaseConstPtr architecture_; // Required architecture
54 RiscOperatorsPtr operators_;
55
56protected:
59 // Dispatchers keep a table of all the kinds of instructions they can handle. The lookup key is typically some sort of
60 // instruction identifier, such as from SgAsmX86Instruction::get_kind(), and comes from the iprocKey() virtual method.
61 typedef std::vector<InsnProcessor*> InsnProcessors;
62 InsnProcessors iproc_table;
63
64public:
65 virtual int8_t asS1(const SgAsmExpression* expr);
66 virtual uint8_t asU1(const SgAsmExpression* expr);
67 virtual int16_t asS2(const SgAsmExpression* expr);
68 virtual uint16_t asU2(const SgAsmExpression* expr);
69
70 // Make a constant number_
71 virtual SValuePtr makeConstant(ValueKind kind, int64_t value);
72
73#ifdef ROSE_ENABLE_BOOST_SERIALIZATION
74private:
75 friend class boost::serialization::access;
76
77 template<class S>
78 void serializeCommon(S &s, const unsigned version) {
79 ASSERT_always_require(version >= 2);
80 s & boost::serialization::make_nvp("operators", operators_); // for backward compatibility
81 s & BOOST_SERIALIZATION_NVP(autoResetInstructionPointer_);
82 //s & iproc_table; -- not saved
83 }
84
85 template<class S>
86 void save(S &s, const unsigned version) const {
87 const_cast<Dispatcher*>(this)->serializeCommon(s, version);
88 ASSERT_not_null(architecture_);
89 const std::string architecture = Architecture::name(architecture_);
90 s & BOOST_SERIALIZATION_NVP(architecture);
91 }
92
93 template<class S>
94 void load(S &s, const unsigned version) {
95 serializeCommon(s, version);
96 std::string architecture;
97 s & BOOST_SERIALIZATION_NVP(architecture);
98 architecture_ = Architecture::findByName(architecture).orThrow();
99 }
100
101 BOOST_SERIALIZATION_SPLIT_MEMBER();
102#endif
103
105 // Real constructors
106protected:
107 Dispatcher(); // used only by boost::serialization
108
109 // Prototypical constructor
110 explicit Dispatcher(const Architecture::BaseConstPtr&);
111
112 Dispatcher(const Architecture::BaseConstPtr&, const RiscOperatorsPtr&);
113
114public:
115 virtual ~Dispatcher();
116
118 // Static allocating constructors. None since this is an abstract class
119
120
122 // Virtual constructors
123public:
125 virtual DispatcherPtr create(const RiscOperatorsPtr &ops) const = 0;
126
128 // Methods to process instructions
129public:
134
140 virtual void processDelaySlot(SgAsmInstruction *delayInsn);
141
142protected:
143 // The part of processing instructions that's common to both `processInstruction` and `processDelaySlot`.
144 virtual void processCommon();
145
147 // Instruction processor table operations
148public:
153
157 virtual void iprocReplace(SgAsmInstruction *insn, InsnProcessor *iproc);
158
160 virtual int iprocKey(SgAsmInstruction*) const = 0;
161
165 virtual void iprocSet(int key, InsnProcessor *iproc);
166
168 virtual InsnProcessor *iprocGet(int key);
169
171 // Convenience methods that defer the call to some member object
172public:
177
184 virtual void operators(const RiscOperatorsPtr&);
189 virtual StatePtr currentState() const;
190
192 virtual SValuePtr protoval() const;
193
199
203 virtual SValuePtr undefined_(size_t nbits) const;
204 virtual SValuePtr unspecified_(size_t nbits) const;
208 virtual SValuePtr number_(size_t nbits, uint64_t number) const;
209
211 // Methods related to registers
212public:
220
225 virtual RegisterDescriptor findRegister(const std::string &regname, size_t nbits=0, bool allowMissing=false) const;
226
231 size_t addressWidth() const;
232
235
238
241
244
257 // Miscellaneous methods that tend to be the same for most dispatchers
258public:
264 virtual void initializeState(const StatePtr&);
265
275
280
285
290
295 virtual void preUpdate(SgAsmExpression*, const BaseSemantics::SValuePtr &enabled);
296
302
306 virtual SValuePtr effectiveAddress(SgAsmExpression*, size_t nbits=0);
307
313 virtual SValuePtr read(SgAsmExpression*, size_t value_nbits=0, size_t addr_nbits=0);
314
318 virtual void write(SgAsmExpression*, const SValuePtr &value, size_t addr_nbits=0);
319};
320
321} // namespace
322} // namespace
323} // namespace
324} // namespace
325
326#ifdef ROSE_ENABLE_BOOST_SERIALIZATION
329#endif
330
331#endif
332#endif
Dispatches instructions through the RISC layer.
Definition Dispatcher.h:47
virtual void operators(const RiscOperatorsPtr &)
Property: RISC operators.
virtual void initializeState(const StatePtr &)
Initialize the state.
Architecture::BaseConstPtr architecture() const
Property: Architecture.
virtual InsnProcessor * iprocLookup(SgAsmInstruction *insn)
Lookup the processor for an instruction.
virtual RegisterDescriptor stackPointerRegister() const
Returns the stack pointer register.
virtual void postUpdate(SgAsmExpression *, const BaseSemantics::SValuePtr &enabled)
Update registers for post-add expressions.
virtual SValuePtr protoval() const
Return the prototypical value.
bool autoResetInstructionPointer_
Reset instruction pointer register for each instruction.
Definition Dispatcher.h:57
virtual void preUpdate(SgAsmExpression *, const BaseSemantics::SValuePtr &enabled)
Update registers for pre-add expressions.
virtual SValuePtr unspecified_(size_t nbits) const
Return a new undefined semantic value.
virtual SValuePtr read(SgAsmExpression *, size_t value_nbits=0, size_t addr_nbits=0)
Reads an R-value expression.
virtual StatePtr currentState() const
Get a pointer to the state object.
virtual RegisterDescriptor stackFrameRegister() const
Returns the stack call frame register.
virtual int iprocKey(SgAsmInstruction *) const =0
Given an instruction, return the InsnProcessor key that can be used as an index into the iproc_table.
virtual SValuePtr number_(size_t nbits, uint64_t number) const
Return a semantic value representing a number.
virtual RegisterDescriptor callReturnRegister() const
Returns the function call return address register.
virtual void incrementRegisters(SgAsmExpression *)
Increment all auto-increment registers in the expression.
virtual SValuePtr undefined_(size_t nbits) const
Return a new undefined semantic value.
virtual void decrementRegisters(SgAsmExpression *)
Decrement all auto-decrement registers in the expression.
virtual InsnProcessor * iprocGet(int key)
Obtain an iproc table entry for the specified key.
virtual RegisterDescriptor findRegister(const std::string &regname, size_t nbits=0, bool allowMissing=false) const
Lookup a register by name.
virtual SValuePtr effectiveAddress(SgAsmExpression *, size_t nbits=0)
Returns a memory address by evaluating the address expression.
bool autoResetInstructionPointer() const
Property: Reset instruction pointer register for each instruction.
Definition Dispatcher.h:251
virtual void iprocReplace(SgAsmInstruction *insn, InsnProcessor *iproc)
Replace an instruction processor with another.
virtual void processInstruction(SgAsmInstruction *insn)
Process a single instruction.
size_t addressWidth() const
Property: Width of memory addresses in bits.
virtual SgAsmInstruction * currentInstruction() const
Returns the instruction that is being processed.
virtual void write(SgAsmExpression *, const SValuePtr &value, size_t addr_nbits=0)
Writes to an L-value expression.
virtual void advanceInstructionPointer(SgAsmInstruction *)
Update the instruction pointer register.
virtual DispatcherPtr create(const RiscOperatorsPtr &ops) const =0
Virtual constructor.
void autoResetInstructionPointer(bool b)
Property: Reset instruction pointer register for each instruction.
Definition Dispatcher.h:252
virtual RegisterDescriptor segmentRegister(SgAsmMemoryReferenceExpression *)
Returns a register descriptor for the segment part of a memory reference expression.
virtual void iprocSet(int key, InsnProcessor *iproc)
Set an iproc table entry to the specified value.
RegisterDictionaryPtr registerDictionary() const
Property: Register dictionary.
virtual RegisterDescriptor instructionPointerRegister() const
Returns the instruction pointer register.
virtual RiscOperatorsPtr operators() const
Property: RISC operators.
virtual void processDelaySlot(SgAsmInstruction *delayInsn)
Process a delay slot.
Functor that knows how to dispatch a single kind of instruction.
Definition Dispatcher.h:28
Describes (part of) a physical CPU register.
Base class for expressions.
Base class for machine instructions.
Reference to memory locations.
const std::string & name(const BaseConstPtr &)
Architecture name free function.
std::shared_ptr< const Base > BaseConstPtr
Reference counted pointer for Architecture::Base.
Sawyer::Result< BasePtr, NotFound > findByName(const std::string &)
Look up a new architecture by name.
Base classes for instruction semantics.
boost::shared_ptr< RiscOperators > RiscOperatorsPtr
Shared-ownership pointer to a RISC operators object.
boost::shared_ptr< Dispatcher > DispatcherPtr
Shared-ownership pointer to a semantics instruction dispatcher.
ValueKind
Kind of an SValue for emulating JVM and CIL instructions.
Definition SValue.h:28
The ROSE library.