ROSE 2.20.0
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Dispatcher.h
1#ifndef ROSE_BinaryAnalysis_InstructionSemantics_BaseSemantics_Dispatcher_H
2#define ROSE_BinaryAnalysis_InstructionSemantics_BaseSemantics_Dispatcher_H
3#include <featureTests.h>
4#ifdef ROSE_ENABLE_BINARY_ANALYSIS
5
6#include <Rose/BinaryAnalysis/BasicTypes.h>
7#include <Rose/BinaryAnalysis/ByteCode/Analysis.h>
8#include <Rose/BinaryAnalysis/InstructionSemantics/BaseSemantics/RiscOperators.h>
9
10#include <boost/enable_shared_from_this.hpp>
11
12#ifdef ROSE_ENABLE_BOOST_SERIALIZATION
13#include <boost/serialization/access.hpp>
14#include <boost/serialization/export.hpp>
15#include <boost/serialization/nvp.hpp>
16#include <boost/serialization/shared_ptr.hpp>
17#endif
18
19namespace Rose {
20namespace BinaryAnalysis {
21namespace InstructionSemantics {
22namespace BaseSemantics {
23
25// Instruction Dispatcher
27
30public:
31 virtual ~InsnProcessor() {}
32 virtual void process(const DispatcherPtr &dispatcher, SgAsmInstruction *insn) = 0;
33};
34
48class Dispatcher: public boost::enable_shared_from_this<Dispatcher> {
49public:
52
53private:
54 Architecture::BaseConstPtr architecture_; // Required architecture
55 RiscOperatorsPtr operators_;
56 uint32_t nextObjectId_ = 1; // next unique object identifier
57
58protected:
61
64 // Dispatchers keep a table of all the kinds of instructions they can handle. The lookup key is typically some sort of
65 // instruction identifier, such as from SgAsmX86Instruction::get_kind(), and comes from the iprocKey() virtual method.
66 typedef std::vector<InsnProcessor*> InsnProcessors;
67 InsnProcessors iproc_table;
68
69public:
70 virtual int8_t asS1(const SgAsmExpression* expr);
71 virtual uint8_t asU1(const SgAsmExpression* expr);
72 virtual int16_t asS2(const SgAsmExpression* expr);
73 virtual uint16_t asU2(const SgAsmExpression* expr);
74 virtual int32_t asS4(const SgAsmExpression* expr);
75
76 // Make a constant number_
77 virtual SValuePtr makeConstant(ValueKind kind, int64_t value);
78
79#ifdef ROSE_ENABLE_BOOST_SERIALIZATION
80private:
81 friend class boost::serialization::access;
82
83 template<class S>
84 void serializeCommon(S &s, const unsigned version) {
85 ASSERT_always_require(version >= 2);
86 s & boost::serialization::make_nvp("operators", operators_); // for backward compatibility
87 s & BOOST_SERIALIZATION_NVP(nextObjectId_);
88 // s & BOOST_SERIALIZATION_NVP(classes_); -- not saved
89 s & BOOST_SERIALIZATION_NVP(autoResetInstructionPointer_);
90 //s & iproc_table; -- not saved
91 }
92
93 template<class S>
94 void save(S &s, const unsigned version) const {
95 const_cast<Dispatcher*>(this)->serializeCommon(s, version);
96 ASSERT_not_null(architecture_);
97 const std::string architecture = Architecture::name(architecture_);
98 s & BOOST_SERIALIZATION_NVP(architecture);
99 }
100
101 template<class S>
102 void load(S &s, const unsigned version) {
103 serializeCommon(s, version);
104 std::string architecture;
105 s & BOOST_SERIALIZATION_NVP(architecture);
106 architecture_ = Architecture::findByName(architecture).orThrow();
107 }
108
109 BOOST_SERIALIZATION_SPLIT_MEMBER();
110#endif
111
113 // Real constructors
114protected:
115 Dispatcher(); // used only by boost::serialization
116
117 // Prototypical constructor
118 explicit Dispatcher(const Architecture::BaseConstPtr&);
119
120 Dispatcher(const Architecture::BaseConstPtr&, const RiscOperatorsPtr&);
121
122public:
123 virtual ~Dispatcher();
124
126 // Static allocating constructors. None since this is an abstract class
127
128
130 // Virtual constructors
131public:
133 virtual DispatcherPtr create(const RiscOperatorsPtr &ops) const = 0;
134
136 // Methods to process instructions
137public:
142
148 virtual void processDelaySlot(SgAsmInstruction *delayInsn);
149
150protected:
151 // The part of processing instructions that's common to both `processInstruction` and `processDelaySlot`.
152 virtual void processCommon();
153
155 // Instruction processor table operations
156public:
161
165 virtual void iprocReplace(SgAsmInstruction *insn, InsnProcessor *iproc);
166
168 virtual int iprocKey(SgAsmInstruction*) const = 0;
169
173 virtual void iprocSet(int key, InsnProcessor *iproc);
174
176 virtual InsnProcessor *iprocGet(int key);
177
179 // Convenience methods that defer the call to some member object
180public:
185
192 virtual void operators(const RiscOperatorsPtr&);
197 virtual StatePtr currentState() const;
198
200 virtual SValuePtr protoval() const;
201
207
210
213
217 virtual SValuePtr undefined_(size_t nbits) const;
218 virtual SValuePtr unspecified_(size_t nbits) const;
222 virtual SValuePtr number_(size_t nbits, uint64_t number) const;
223
225 // Methods related to registers
226public:
234
239 virtual RegisterDescriptor findRegister(const std::string &regname, size_t nbits=0, bool allowMissing=false) const;
240
245 size_t addressWidth() const;
246
249
252
255
258
271 // Miscellaneous methods that tend to be the same for most dispatchers
272public:
278 virtual void initializeState(const StatePtr&);
279
282
285
294
304
309
314
319
324 virtual void preUpdate(SgAsmExpression*, const BaseSemantics::SValuePtr &enabled);
325
331
335 virtual SValuePtr effectiveAddress(SgAsmExpression*, size_t nbits=0);
336
342 virtual SValuePtr read(SgAsmExpression*, size_t value_nbits=0, size_t addr_nbits=0);
343
347 virtual void write(SgAsmExpression*, const SValuePtr &value, size_t addr_nbits=0);
348};
349
350} // namespace
351} // namespace
352} // namespace
353} // namespace
354
355#ifdef ROSE_ENABLE_BOOST_SERIALIZATION
358#endif
359
360#endif
361#endif
Dispatches instructions through the RISC layer.
Definition Dispatcher.h:48
virtual void operators(const RiscOperatorsPtr &)
Property: RISC operators.
virtual void initializeState(const StatePtr &)
Initialize the state.
Architecture::BaseConstPtr architecture() const
Property: Architecture.
virtual InsnProcessor * iprocLookup(SgAsmInstruction *insn)
Lookup the processor for an instruction.
virtual RegisterDescriptor stackPointerRegister() const
Returns the stack pointer register.
virtual void postUpdate(SgAsmExpression *, const BaseSemantics::SValuePtr &enabled)
Update registers for post-add expressions.
virtual SValuePtr protoval() const
Return the prototypical value.
const ByteCode::ClassRepository::Ptr & classRepository() const
Returns the ByteCode::Class repository.
bool autoResetInstructionPointer_
Reset instruction pointer register for each instruction.
Definition Dispatcher.h:62
virtual void preUpdate(SgAsmExpression *, const BaseSemantics::SValuePtr &enabled)
Update registers for pre-add expressions.
virtual SValuePtr unspecified_(size_t nbits) const
Return a new undefined semantic value.
virtual SValuePtr read(SgAsmExpression *, size_t value_nbits=0, size_t addr_nbits=0)
Reads an R-value expression.
virtual StatePtr currentState() const
Get a pointer to the state object.
virtual RegisterDescriptor stackFrameRegister() const
Returns the stack call frame register.
virtual int iprocKey(SgAsmInstruction *) const =0
Given an instruction, return the InsnProcessor key that can be used as an index into the iproc_table.
virtual SValuePtr number_(size_t nbits, uint64_t number) const
Return a semantic value representing a number.
void completeReturn(BaseSemantics::RiscOperators *, const BaseSemantics::SValuePtr result=BaseSemantics::SValuePtr())
Completes a return from the current method.
virtual RegisterDescriptor callReturnRegister() const
Returns the function call return address register.
virtual void incrementRegisters(SgAsmExpression *)
Increment all auto-increment registers in the expression.
virtual SValuePtr undefined_(size_t nbits) const
Return a new undefined semantic value.
uint32_t allocateObjectId()
Allocates a new unique object identifier.
virtual void decrementRegisters(SgAsmExpression *)
Decrement all auto-decrement registers in the expression.
virtual InsnProcessor * iprocGet(int key)
Obtain an iproc table entry for the specified key.
virtual RegisterDescriptor findRegister(const std::string &regname, size_t nbits=0, bool allowMissing=false) const
Lookup a register by name.
void classes(const ByteCode::ClassRepository *classes)
Sets non-owning pointer to the ByteCode class repository maintained by the Engine.
virtual SValuePtr effectiveAddress(SgAsmExpression *, size_t nbits=0)
Returns a memory address by evaluating the address expression.
void classRepository(const ByteCode::ClassRepository::Ptr &repo)
Sets the ByteCode::Class repository.
bool autoResetInstructionPointer() const
Property: Reset instruction pointer register for each instruction.
Definition Dispatcher.h:265
virtual void iprocReplace(SgAsmInstruction *insn, InsnProcessor *iproc)
Replace an instruction processor with another.
virtual void processInstruction(SgAsmInstruction *insn)
Process a single instruction.
size_t addressWidth() const
Property: Width of memory addresses in bits.
virtual SgAsmInstruction * currentInstruction() const
Returns the instruction that is being processed.
virtual void write(SgAsmExpression *, const SValuePtr &value, size_t addr_nbits=0)
Writes to an L-value expression.
ByteCode::ClassRepository::Ptr classes_
The ByteCode class repository maintained by the Engine.
Definition Dispatcher.h:60
virtual void advanceInstructionPointer(SgAsmInstruction *)
Update the instruction pointer register.
virtual DispatcherPtr create(const RiscOperatorsPtr &ops) const =0
Virtual constructor.
void autoResetInstructionPointer(bool b)
Property: Reset instruction pointer register for each instruction.
Definition Dispatcher.h:266
virtual RegisterDescriptor segmentRegister(SgAsmMemoryReferenceExpression *)
Returns a register descriptor for the segment part of a memory reference expression.
virtual void iprocSet(int key, InsnProcessor *iproc)
Set an iproc table entry to the specified value.
RegisterDictionaryPtr registerDictionary() const
Property: Register dictionary.
virtual RegisterDescriptor instructionPointerRegister() const
Returns the instruction pointer register.
virtual RiscOperatorsPtr operators() const
Property: RISC operators.
virtual void processDelaySlot(SgAsmInstruction *delayInsn)
Process a delay slot.
Functor that knows how to dispatch a single kind of instruction.
Definition Dispatcher.h:29
Base class for most instruction semantics RISC operators.
Describes (part of) a physical CPU register.
Base class for expressions.
Base class for machine instructions.
Reference to memory locations.
const std::string & name(const BaseConstPtr &)
Architecture name free function.
std::shared_ptr< const Base > BaseConstPtr
Reference counted pointer for Architecture::Base.
Sawyer::Result< BasePtr, NotFound > findByName(const std::string &)
Look up a new architecture by name.
Base classes for instruction semantics.
boost::shared_ptr< RiscOperators > RiscOperatorsPtr
Shared-ownership pointer to a RISC operators object.
boost::shared_ptr< Dispatcher > DispatcherPtr
Shared-ownership pointer to a semantics instruction dispatcher.
ValueKind
Kind of an SValue for emulating JVM and CIL instructions.
Definition SValue.h:28
The ROSE library.