ROSE 2.1.0
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DispatcherJvm.h
1#ifndef ROSE_BinaryAnalysis_InstructionSemantics_DispatcherJvm_H
2#define ROSE_BinaryAnalysis_InstructionSemantics_DispatcherJvm_H
3#include <featureTests.h>
4#ifdef ROSE_ENABLE_BINARY_ANALYSIS
5
6#include <Rose/BinaryAnalysis/InstructionSemantics/BaseSemantics/Dispatcher.h>
7
8#ifdef ROSE_HAVE_BOOST_SERIALIZATION_LIB
9#include <boost/serialization/access.hpp>
10#include <boost/serialization/base_object.hpp>
11#include <boost/serialization/export.hpp>
12#include <boost/serialization/nvp.hpp>
13#include <boost/serialization/split_member.hpp>
14#endif
15
16namespace Rose {
17namespace BinaryAnalysis {
18namespace InstructionSemantics {
19
21using DispatcherJvmPtr = boost::shared_ptr<class DispatcherJvm>;
22
27public:
30
33
34public:
43#ifdef ROSE_HAVE_BOOST_SERIALIZATION_LIB
44private:
45 friend class boost::serialization::access;
46
47 template<class S>
48 void save(S &s, const unsigned /*version*/) const {
49 s & BOOST_SERIALIZATION_BASE_OBJECT_NVP(Super);
50 }
51
52 template<class S>
53 void load(S &s, const unsigned /*version*/) {
54 s & BOOST_SERIALIZATION_BASE_OBJECT_NVP(Super);
55 initializeDispatchTable();
56 initializeMemoryState();
57 }
58
59 BOOST_SERIALIZATION_SPLIT_MEMBER();
60#endif
61
62public:
63 ~DispatcherJvm();
64protected:
65 DispatcherJvm() = delete;
66 explicit DispatcherJvm(const Architecture::BaseConstPtr&);
68
69public:
74
77
80
81
82public:
83 // documented in the base class
85 virtual int iprocKey(SgAsmInstruction*) const override;
86
87private:
88 // Initialize the dispatch table that handles each kind of instruction
89 void initializeDispatchTable();
90
91 // Initialize memory state, such as the default byte order
92 void initializeMemoryState();
93
94};
95
96} // namespace
97} // namespace
98} // namespace
99
100#ifdef ROSE_HAVE_BOOST_SERIALIZATION_LIB
102#endif
103
104#endif
105#endif
Dispatches instructions through the RISC layer.
Definition Dispatcher.h:46
Dispatches JVM instructions through the semantics layer.
virtual int iprocKey(SgAsmInstruction *) const override
Given an instruction, return the InsnProcessor key that can be used as an index into the iproc_table.
const RegisterDescriptor REG_SP
Cached register.
static Ptr instance(const Architecture::BaseConstPtr &, const BaseSemantics::RiscOperatorsPtr &)
Constructor.
const RegisterDescriptor REG_FP
Cached register.
static Ptr promote(const BaseSemantics::DispatcherPtr &)
Dynamic cast to DispatcherJvmPtr with assertion.
const RegisterDescriptor REG_PC
Cached register.
static Ptr instance(const Architecture::BaseConstPtr &)
Construct a prototypical dispatcher.
DispatcherJvmPtr Ptr
Shared-ownership pointer.
virtual BaseSemantics::DispatcherPtr create(const BaseSemantics::RiscOperatorsPtr &) const override
Virtual constructor.
Describes (part of) a physical CPU register.
Base class for machine instructions.
std::shared_ptr< const Base > BaseConstPtr
Reference counted pointer for Architecture::Base.
boost::shared_ptr< RiscOperators > RiscOperatorsPtr
Shared-ownership pointer to a RISC operators object.
boost::shared_ptr< Dispatcher > DispatcherPtr
Shared-ownership pointer to a semantics instruction dispatcher.
boost::shared_ptr< class DispatcherJvm > DispatcherJvmPtr
Shared-ownership pointer to a JVM instruction dispatcher.
The ROSE library.