Description
Definition at line 34 of file DispatcherCil.h.
Classes | |
| struct | CilPendingPrefixState |
| class | CilTypeAnalysis |
Public Types | |
| using | Super = BaseSemantics::Dispatcher |
| Base type. | |
| using | Ptr = DispatcherCilPtr |
| Shared-ownership pointer. | |
 Public Types inherited from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher | |
| using | Ptr = DispatcherPtr |
| Shared-ownership pointer. | |
Public Member Functions | |
| virtual BaseSemantics::DispatcherPtr | create (const BaseSemantics::RiscOperatorsPtr &) const override |
| Virtual constructor. | |
| virtual RegisterDescriptor | instructionPointerRegister () const override |
| Returns the instruction pointer register. | |
| virtual RegisterDescriptor | stackPointerRegister () const override |
| Returns the stack pointer register. | |
| virtual BaseSemantics::SValuePtr | read (SgAsmExpression *, size_t value_nbits, size_t addr_nbits=0) override |
| Reads an R-value expression. | |
| int | iprocKey (SgAsmInstruction *insn_) const override |
| Given an instruction, return the InsnProcessor key that can be used as an index into the iproc_table. | |
| BaseSemantics::InsnProcessor * | iprocLookup (SgAsmInstruction *insn) override |
| Lookup the processor for an instruction. | |
| void | updateFpsrExcInan (const BaseSemantics::SValuePtr &a, SgAsmType *aType, const BaseSemantics::SValuePtr &b, SgAsmType *bType) |
| Set or clear FPSR EXC INAN bit. | |
| void | updateFpsrExcIde (const BaseSemantics::SValuePtr &a, SgAsmType *aType, const BaseSemantics::SValuePtr &b, SgAsmType *bType) |
| Set or clear FPSR EXC IDE bit. | |
| void | updateFpsrExcOvfl (const BaseSemantics::SValuePtr &intermediate, SgAsmType *valueType, SgAsmType *rounding, SgAsmType *dstType) |
| Set or clear FPSR EXC OVFL bit. | |
| void | updateFpsrExcUnfl (const BaseSemantics::SValuePtr &intermediate, SgAsmType *valueType, SgAsmType *rounding, SgAsmType *dstType) |
| Set or clear FPSR EXC UVFL bit. | |
| void | updateFpsrExcInex () |
| Set or clear FPSR EXC INEX bit. | |
| BaseSemantics::SValuePtr | condition (CilInstructionKind, BaseSemantics::RiscOperators *) |
| Determines if an instruction should branch. | |
| void | accumulateFpExceptions () |
| Update accrued floating-point exceptions. | |
| void | adjustFpConditionCodes (const BaseSemantics::SValuePtr &result, SgAsmFloatType *) |
| Set floating point condition codes according to result. | |
| CilTypeAnalysis & | typeAnalysis () |
| const CilTypeAnalysis & | typeAnalysis () const |
| CilPendingPrefixState & | pendingPrefix () |
| const CilPendingPrefixState & | pendingPrefix () const |
| void | clearPendingPrefix () |
| void | cilMetadata (const DispatcherCil::CilTypeAnalysis::CilMetadataProvider *provider) |
| const DispatcherCil::CilTypeAnalysis::CilMetadataProvider * | cilMetadata () const |
| const CilTypeAnalysis::CurrentMethodDescriptor & | currentMethod () const |
| void | currentMethod (const CilTypeAnalysis::CurrentMethodDescriptor &m) |
| size_t | cilPointerBits () |
| bool | allowByteOnlyExceptionFallback () const |
| void | allowByteOnlyExceptionFallback (bool b) |
| Public Member Functions inherited from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher | |
| virtual int8_t | asS1 (const SgAsmExpression *expr) |
| virtual uint8_t | asU1 (const SgAsmExpression *expr) |
| virtual int16_t | asS2 (const SgAsmExpression *expr) |
| virtual uint16_t | asU2 (const SgAsmExpression *expr) |
| virtual SValuePtr | makeConstant (ValueKind kind, int64_t value) |
| virtual void | processInstruction (SgAsmInstruction *insn) |
| Process a single instruction. | |
| virtual void | processDelaySlot (SgAsmInstruction *delayInsn) |
| Process a delay slot. | |
| virtual void | iprocReplace (SgAsmInstruction *insn, InsnProcessor *iproc) |
| Replace an instruction processor with another. | |
| virtual void | iprocSet (int key, InsnProcessor *iproc) |
| Set an iproc table entry to the specified value. | |
| virtual InsnProcessor * | iprocGet (int key) |
| Obtain an iproc table entry for the specified key. | |
| Architecture::BaseConstPtr | architecture () const |
| Property: Architecture. | |
| virtual StatePtr | currentState () const |
| Get a pointer to the state object. | |
| virtual SValuePtr | protoval () const |
| Return the prototypical value. | |
| virtual SgAsmInstruction * | currentInstruction () const |
| Returns the instruction that is being processed. | |
| virtual SValuePtr | number_ (size_t nbits, uint64_t number) const |
| Return a semantic value representing a number. | |
| RegisterDictionaryPtr | registerDictionary () const |
| Property: Register dictionary. | |
| virtual RegisterDescriptor | findRegister (const std::string ®name, size_t nbits=0, bool allowMissing=false) const |
| Lookup a register by name. | |
| size_t | addressWidth () const |
| Property: Width of memory addresses in bits. | |
| virtual RegisterDescriptor | stackFrameRegister () const |
| Returns the stack call frame register. | |
| virtual RegisterDescriptor | callReturnRegister () const |
| Returns the function call return address register. | |
| virtual void | initializeState (const StatePtr &) |
| Initialize the state. | |
| virtual void | advanceInstructionPointer (SgAsmInstruction *) |
| Update the instruction pointer register. | |
| virtual RegisterDescriptor | segmentRegister (SgAsmMemoryReferenceExpression *) |
| Returns a register descriptor for the segment part of a memory reference expression. | |
| virtual void | incrementRegisters (SgAsmExpression *) |
| Increment all auto-increment registers in the expression. | |
| virtual void | decrementRegisters (SgAsmExpression *) |
| Decrement all auto-decrement registers in the expression. | |
| virtual void | preUpdate (SgAsmExpression *, const BaseSemantics::SValuePtr &enabled) |
| Update registers for pre-add expressions. | |
| virtual void | postUpdate (SgAsmExpression *, const BaseSemantics::SValuePtr &enabled) |
| Update registers for post-add expressions. | |
| virtual SValuePtr | effectiveAddress (SgAsmExpression *, size_t nbits=0) |
| Returns a memory address by evaluating the address expression. | |
| virtual void | write (SgAsmExpression *, const SValuePtr &value, size_t addr_nbits=0) |
| Writes to an L-value expression. | |
| virtual RiscOperatorsPtr | operators () const |
| Property: RISC operators. | |
| virtual void | operators (const RiscOperatorsPtr &) |
| Property: RISC operators. | |
| virtual SValuePtr | undefined_ (size_t nbits) const |
| Return a new undefined semantic value. | |
| virtual SValuePtr | unspecified_ (size_t nbits) const |
| Return a new undefined semantic value. | |
| bool | autoResetInstructionPointer () const |
| Property: Reset instruction pointer register for each instruction. | |
| void | autoResetInstructionPointer (bool b) |
| Property: Reset instruction pointer register for each instruction. | |
Static Public Member Functions | |
| static DispatcherCilPtr | instance (const Architecture::BaseConstPtr &) |
| Construct a prototypical dispatcher. | |
| static DispatcherCilPtr | instance (const Architecture::BaseConstPtr &, const BaseSemantics::RiscOperatorsPtr &) |
| Constructor. | |
| static DispatcherCilPtr | promote (const BaseSemantics::DispatcherPtr &) |
| Dynamic cast to DispatcherCilPtr with assertion. | |
Public Attributes | |
| RegisterDescriptor | REG_PC |
| size_t | cilPointerBits_ = 32 |
Protected Member Functions | |
| DispatcherCil (const Architecture::BaseConstPtr &) | |
| DispatcherCil (const Architecture::BaseConstPtr &, const BaseSemantics::RiscOperatorsPtr &) | |
| void | initializeDispatchTable () |
| Loads the iproc table with instruction processing functors. | |
| void | initializeMemoryState () |
| Make sure memory is set up correctly. | |
| Protected Member Functions inherited from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher | |
| Dispatcher (const Architecture::BaseConstPtr &) | |
| Dispatcher (const Architecture::BaseConstPtr &, const RiscOperatorsPtr &) | |
| virtual void | processCommon () |
Additional Inherited Members | |
| Protected Types inherited from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher | |
| typedef std::vector< InsnProcessor * > | InsnProcessors |
| Protected Attributes inherited from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher | |
| bool | autoResetInstructionPointer_ = true |
| Reset instruction pointer register for each instruction. | |
| InsnProcessors | iproc_table |
Member Typedef Documentation
◆ Super
Base type.
Definition at line 38 of file DispatcherCil.h.
◆ Ptr
Shared-ownership pointer.
Definition at line 41 of file DispatcherCil.h.
Member Function Documentation
◆ initializeDispatchTable()
|
protected |
Loads the iproc table with instruction processing functors.
This normally happens from the constructor.
◆ initializeMemoryState()
|
protected |
Make sure memory is set up correctly.
For instance, byte order should be big endian.
◆ instance()
|
static |
Construct a prototypical dispatcher.
The only thing this dispatcher can be used for is to create another dispatcher with the virtual create method.
◆ create()
|
overridevirtual |
Virtual constructor.
Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher.
◆ instructionPointerRegister()
|
overridevirtual |
Returns the instruction pointer register.
Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher.
◆ stackPointerRegister()
|
overridevirtual |
Returns the stack pointer register.
Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher.
◆ read()
|
overridevirtual |
Reads an R-value expression.
The expression can be a constant, register reference, or memory reference. The width of the returned value is specified by the value_nbits argument, and if this argument is zero then the width of the expression type is used. The width of the address passed to lower-level memory access functions is specified by addr_nbits. If addr_nbits is zero then the natural width of the effective address is passed to lower level functions.
Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher.
◆ iprocKey()
|
overridevirtual |
Given an instruction, return the InsnProcessor key that can be used as an index into the iproc_table.
Implements Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher.
◆ iprocLookup()
|
overridevirtual |
Lookup the processor for an instruction.
Looks up the functor that has been registered to process the given instruction. Returns the null pointer if the instruction cannot be processed. Instruction processor objects are managed by the caller; the instruction itself is only used for the duration of this call.
Reimplemented from Rose::BinaryAnalysis::InstructionSemantics::BaseSemantics::Dispatcher.
◆ updateFpsrExcOvfl()
| void Rose::BinaryAnalysis::InstructionSemantics::DispatcherCil::updateFpsrExcOvfl | ( | const BaseSemantics::SValuePtr & | intermediate, |
| SgAsmType * | valueType, | ||
| SgAsmType * | rounding, | ||
| SgAsmType * | dstType | ||
| ) |
Set or clear FPSR EXC OVFL bit.
Set if the destination is a floating-point data register or memory (dstType) and the intermediate result (intermediate) has an exponent that is greater than or equal to the maximum exponent value of the selected rounding precision (rounding)
◆ updateFpsrExcUnfl()
| void Rose::BinaryAnalysis::InstructionSemantics::DispatcherCil::updateFpsrExcUnfl | ( | const BaseSemantics::SValuePtr & | intermediate, |
| SgAsmType * | valueType, | ||
| SgAsmType * | rounding, | ||
| SgAsmType * | dstType | ||
| ) |
Set or clear FPSR EXC UVFL bit.
Set if the intermediate result of an arithmetic instruction is too small to be represented as a normalized number in a floating-point register or memory using the selected rounding precision, that is, when the intermediate result exponent is less than or equal to the minimum exponent value of the selected rounding precision. Cleared otherwise. Underflow can ony occur when the desitnation format is single or double precision. When the destination is byte, word, or longword, the conversion ounderflows to zero without causing an underflow or an operand error.
◆ typeAnalysis() [1/2]
|
inline |
Definition at line 593 of file DispatcherCil.h.
◆ typeAnalysis() [2/2]
|
inline |
Definition at line 598 of file DispatcherCil.h.
◆ pendingPrefix() [1/2]
|
inline |
Definition at line 607 of file DispatcherCil.h.
◆ pendingPrefix() [2/2]
|
inline |
Definition at line 608 of file DispatcherCil.h.
◆ clearPendingPrefix()
|
inline |
Definition at line 609 of file DispatcherCil.h.
◆ cilMetadata() [1/2]
|
inline |
Definition at line 616 of file DispatcherCil.h.
◆ cilMetadata() [2/2]
|
inline |
Definition at line 621 of file DispatcherCil.h.
◆ currentMethod() [1/2]
|
inline |
Definition at line 630 of file DispatcherCil.h.
◆ currentMethod() [2/2]
|
inline |
Definition at line 635 of file DispatcherCil.h.
◆ cilPointerBits()
|
inline |
Definition at line 645 of file DispatcherCil.h.
◆ allowByteOnlyExceptionFallback() [1/2]
|
inline |
Definition at line 656 of file DispatcherCil.h.
◆ allowByteOnlyExceptionFallback() [2/2]
|
inline |
Definition at line 661 of file DispatcherCil.h.
Member Data Documentation
◆ REG_PC
| RegisterDescriptor Rose::BinaryAnalysis::InstructionSemantics::DispatcherCil::REG_PC |
Definition at line 64 of file DispatcherCil.h.
◆ cilPointerBits_
| size_t Rose::BinaryAnalysis::InstructionSemantics::DispatcherCil::cilPointerBits_ = 32 |
Definition at line 642 of file DispatcherCil.h.
The documentation for this class was generated from the following file:
