ROSE 2.9.0
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DispatcherCil.h
1#ifndef ROSE_BinaryAnalysis_InstructionSemantics_DispatcherCil_H
2#define ROSE_BinaryAnalysis_InstructionSemantics_DispatcherCil_H
3#include <featureTests.h>
4#ifdef ROSE_ENABLE_BINARY_ANALYSIS
5
6#include <Rose/BinaryAnalysis/BasicTypes.h>
7#include <Rose/BinaryAnalysis/Architecture/Base.h>
8#include <Rose/BinaryAnalysis/InstructionSemantics/BaseSemantics.h>
9#include <Rose/BinaryAnalysis/InstructionSemantics/BaseSemantics/Dispatcher.h>
10#include <Rose/BinaryAnalysis/InstructionEnumsCil.h>
11
12#ifdef ROSE_ENABLE_BOOST_SERIALIZATION
13#include <boost/serialization/access.hpp>
14#include <boost/serialization/base_object.hpp>
15#include <boost/serialization/export.hpp>
16#include <boost/serialization/split_member.hpp>
17#endif
18
19namespace Rose {
20namespace BinaryAnalysis {
21namespace InstructionSemantics {
22
24typedef boost::shared_ptr<class DispatcherCil> DispatcherCilPtr;
25
27public:
30
33
34public:
44 // Floating-point condition code bits
46 // Floating-point status register exception bits
49 // Floating-point status register accrued exception bits
53#ifdef ROSE_ENABLE_BOOST_SERIALIZATION
54private:
55 friend class boost::serialization::access;
56
57 template<class S>
58 void save(S &s, const unsigned /*version*/) const {
59 s & BOOST_SERIALIZATION_BASE_OBJECT_NVP(Super);
60 };
61
62 template<class S>
63 void load(S &s, const unsigned /*version*/) {
64 s & BOOST_SERIALIZATION_BASE_OBJECT_NVP(Super);
65#if 0
66 regcache_init();
67 iproc_init();
68 memory_init();
69#else
72#endif
73 }
74
75 BOOST_SERIALIZATION_SPLIT_MEMBER();
76#endif
77
78private:
79 DispatcherCil(); // used only by boost::serialization
80
81protected:
82 DispatcherCil(const Architecture::BaseConstPtr&); // prototypical constructor
84
85#if 0
89 void regcache_init(const Architecture::Base::ConstPtr&);
90#endif
91
96
101
102public:
104
109
112
115
118
120 virtual RegisterDescriptor stackPointerRegister() const override;
121 virtual BaseSemantics::SValuePtr read(SgAsmExpression*, size_t value_nbits, size_t addr_nbits=0) override;
122
123 int iprocKey(SgAsmInstruction *insn_) const override;
125
128 const BaseSemantics::SValuePtr &b, SgAsmType *bType);
129
132 const BaseSemantics::SValuePtr &b, SgAsmType *bType);
133
139 void updateFpsrExcOvfl(const BaseSemantics::SValuePtr &intermediate, SgAsmType *valueType,
140 SgAsmType *rounding, SgAsmType *dstType);
141
149 void updateFpsrExcUnfl(const BaseSemantics::SValuePtr &intermediate, SgAsmType *valueType,
150 SgAsmType *rounding, SgAsmType *dstType);
151
154
157
160
163};
164
165} // namespace
166} // namespace
167} // namespace
168
169#ifdef ROSE_ENABLE_BOOST_SERIALIZATION
171#endif
172
173#endif
174#endif
BaseConstPtr ConstPtr
Reference counting pointer to const object.
Dispatches instructions through the RISC layer.
Definition Dispatcher.h:46
Functor that knows how to dispatch a single kind of instruction.
Definition Dispatcher.h:27
Base class for most instruction semantics RISC operators.
static DispatcherCilPtr instance(const Architecture::BaseConstPtr &, const BaseSemantics::RiscOperatorsPtr &)
Constructor.
void initializeMemoryState()
Make sure memory is set up correctly.
void updateFpsrExcUnfl(const BaseSemantics::SValuePtr &intermediate, SgAsmType *valueType, SgAsmType *rounding, SgAsmType *dstType)
Set or clear FPSR EXC UVFL bit.
void updateFpsrExcInan(const BaseSemantics::SValuePtr &a, SgAsmType *aType, const BaseSemantics::SValuePtr &b, SgAsmType *bType)
Set or clear FPSR EXC INAN bit.
virtual BaseSemantics::SValuePtr read(SgAsmExpression *, size_t value_nbits, size_t addr_nbits=0) override
Reads an R-value expression.
void updateFpsrExcIde(const BaseSemantics::SValuePtr &a, SgAsmType *aType, const BaseSemantics::SValuePtr &b, SgAsmType *bType)
Set or clear FPSR EXC IDE bit.
BaseSemantics::SValuePtr condition(CilInstructionKind, BaseSemantics::RiscOperators *)
Determines if an instruction should branch.
void updateFpsrExcInex()
Set or clear FPSR EXC INEX bit.
DispatcherCilPtr Ptr
Shared-ownership pointer.
void updateFpsrExcOvfl(const BaseSemantics::SValuePtr &intermediate, SgAsmType *valueType, SgAsmType *rounding, SgAsmType *dstType)
Set or clear FPSR EXC OVFL bit.
virtual RegisterDescriptor stackPointerRegister() const override
Returns the stack pointer register.
static DispatcherCilPtr instance(const Architecture::BaseConstPtr &)
Construct a prototypical dispatcher.
BaseSemantics::InsnProcessor * iprocLookup(SgAsmInstruction *insn) override
Lookup the processor for an instruction.
static DispatcherCilPtr promote(const BaseSemantics::DispatcherPtr &)
Dynamic cast to DispatcherCilPtr with assertion.
int iprocKey(SgAsmInstruction *insn_) const override
Given an instruction, return the InsnProcessor key that can be used as an index into the iproc_table.
virtual RegisterDescriptor instructionPointerRegister() const override
Returns the instruction pointer register.
void accumulateFpExceptions()
Update accrued floating-point exceptions.
virtual BaseSemantics::DispatcherPtr create(const BaseSemantics::RiscOperatorsPtr &) const override
Virtual constructor.
void initializeDispatchTable()
Loads the iproc table with instruction processing functors.
void adjustFpConditionCodes(const BaseSemantics::SValuePtr &result, SgAsmFloatType *)
Set floating point condition codes according to result.
Describes (part of) a physical CPU register.
Base class for expressions.
Floating point types.
Base class for machine instructions.
Base class for binary types.
std::shared_ptr< const Base > BaseConstPtr
Reference counted pointer for Architecture::Base.
boost::shared_ptr< RiscOperators > RiscOperatorsPtr
Shared-ownership pointer to a RISC operators object.
boost::shared_ptr< Dispatcher > DispatcherPtr
Shared-ownership pointer to a semantics instruction dispatcher.
boost::shared_ptr< class DispatcherCil > DispatcherCilPtr
Shared-ownership pointer to an CIL instruction dispatcher.
The ROSE library.